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P.B. Bogdanov, O.J. Sudareva The KOMDIV microprocessors performance on a number of typical computational problems |
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Abstract.In this paper we consider Russian microprocessors of the KOMDIV series devised by the ISR RAS: KOMDIV128-RIO and KOMDIV128-M. For three computational algorithms: Fast Fourier Transform (FFT), geometric multigrid method (MG) and sparse matrix-vector multiplication (SpMV) – we provide the results of performance testing on these microprocessors compared to several products of Intel, Texas Instruments and MCST companies. We draw conclusions about the applicability of KOMDIV microprocessors for general-purpose computing. Keywords: KOMDIV, Elbrus, signal processing, FFT, NAS Parallel Benchmarks, MG, SpMV PP. 104-111. References1. Rajko G.O., Pavlovskij J.A., Melkanovich V.S. Technology of programming of multiprocessor processing of hydroacoustic signals on “KOMDIV” computer set // Hydroacoustics. Issue 20 (2). — SPb.: The “Oceanpribor” concern, 2014. — 118 pp. 2. Pavlov A.N. The overview of RapidIO communication framework. A formal RapidIO model. The RapidIO software support // Modeling and visualization. Multiprocessor systems. Software development tools / Collection of articles edited by RAS academician V. B. Betelin. — Moscow: ISR RAS, 2009. — pp.105 –147. 3. Sudareva O.J. The effective implementation of the Fast Fourier Transform and convolution algorithms for the KOMDIV128- RIO microprocessor. — Moscow: ISR RAS, 2014. — 266 pp. 4. D. Bailey, E. Barszcz, J. Barton, D. Browning, R. Carter, L. Dagum, R. Fatoohi, S. Fineberg, P. Fred-erickson, T. Lasinski, R. Schreiber, H. Simon,V.Venkatakrishnan and S.Weeratunga. The NAS Parallel Benchmarks // RNR Technical Report RNR-94-007, March 1994. 5. Sudareva O.J. The NPB MG algorithm implementation for multi-processor complex based on the KOMDIV128-RIO microprocessor // ISR RAS transactions, 2015. V. 5, № 1, pp. 75–78. 6. Bogdanov P.B., Sudareva O.J. The applicability of Russian special-purpose KOMDIV microprocessor series for scientific computations // Information Technologies and Computational Systems, 2016. V. 3, pp. 45–65. 7. Frigo M., Johnson S.G. The design and implementation of FFTW3 // Proceedings of the IEEE, 2005. V. 93, № 2, pp. 216– 231. 8. Kumar Mukesh. White Paper — Comparing TI’s TMS320C6671 DSP with ADI’s ADSP-TS201S TigerSHARC® Processor // SPRABN8A — January 2012. 9. Li Xiaohui, Blinka Ellen. Very large FFT for TMS320C6678 processors // Texas Instruments — 2015. 10. AO “MCST”. The Elbrus-4S microprocessor // 11. URL: http://www.mcst.ru/mikroprocessor-elbrus4s 12. Tutliaeva E.O., Konukhov S.S., Moskovsky A.A., Odintsov I.O. The estimate of potentiality of the Elbrus platform for highperformance computing // Supercomputing days in Russia: proceedings of the international conference, 2016. Pp. 373– 385. 13. Bogdanov P.B., Sudareva O.J. Heterogeneous programming based on the OpenCL standard // Supercomputing and mathematical modeling: proceedings of the XV international conference, October 13-17, 2014. / ed. By R.M. Shagaliev. – Sarov: RFNC-VNIIEF, 2015. Pp. 123–137. 14. DDR3 SDRAM // URL: https://en.wikipedia.org/wiki/DDR3_SDRAM
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